Open Source Java Electronic Design Automation (EDA) Software - Page 4

This project provides a 'brute-force' search for optimum assembler fragments for Microchip Technology Inc's mid-range PIC processor range.

Generic packet visualization tool for generating flow diagrams from formatted logs. Can be used for cache coherency diagrams, software interaction diagrams or to plot network communications.

Given a simple net-list describing the high level power architecture of your system Penthode: - simulates the voltage and current from device turn on to the steady state. - highlights components working out of specification - draws a nice power tree diagram showing the currents/powers balance - plots node transient voltage and gate current waveforms It is possible to change component parameters interactively to improve the design

O Projeto Cleusa - É uma interface de Gerenciamento de dispositivos. O projeto ROSANA aciona ações nos relês. O projeto Cleusa utiliza uma dispositivo de Hardware especifico, porem pode ser compatibilizado com qualquer outro hardware.

PCB plugin for rat selection. The user supplies a pin list via a text file. The plugin selects the rats which connects the listed pins. This functionality intends to help auto-routing with variable track width. See the web site for more detail.

Remote Control for Embedded Device Provide an user interface for a embedded device on a PC or a mobile phone. Communication through RS232, USB, TCP_IP, Bluetooth...

Open framework for the automated synthesis of integrated heterogeneous (analog and multi-domain) systems.

Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. NO tool is providing a global framework to develop algorithms. Silicis is a new formal framework for designing [verification] algorithms.

SymtaP is a performance analysis tool to determine the worst case execution time for embedded real time applications.

Processes boolean functions which can be provided either as a list of 0s and 1s or which can be provided as a formula in first-order logic (using disjunctive or conjunctive normal forms). Internally the Quine McCluskey algorithm is used.

PPPP is a computer program used for partitioning parameterized orthogonal polygons into parameterized rectangles. With this program, it is possible to build rectangular corner stitching data structure for parameterized VLSI layouts.

The SESAME (Simulation of Embedded System Architectures for Multilevel Exploration) software system is an embedded system co-simulation environment and research tool which implements the ideas of the SESAME project at the University of Amsterdam.

Application able to simplify and make calculations involving a circuit built by the user.

VLSI Layout 3d is a 3d visualization software for VLSI designs created in LASI. This project is gearing up to go open-source!

Verilog 2005 synthesizable subset parser built on ANTLR framework. 3-nov-2014: latest release here: https://github.com/gburdell/parser

Netlist database and manipulation API with interfaces to Java and Ruby. Verilog netlist inputs are supported. Project branch continues to evolve: https://github.com/gburdell/nldb including addition of tclsh UI.

Program for creating Verilog synthesizable XOR trees for high performance designs. Supports creation of Hamming Code (ECC) generators, checkers, and GF2 Multipliers.

Ycad is a library of CAD functions in Java. Currently only DXF is supported for reading, viewing and writing. The DXF drawing may be rendered to a Graphics object for printing or imaging.

GOOD NEWS: The functionality provided by this utility is now part of Kicad itself. Well done Kicad team. Keep up the good work. ------ This utility takes an input DSN file, exported from Kicad for example, and enables the user to assign various thick

GNU PIC LIBRARY PROJECT The interest of this project is to develop a set of Libraries that are released in LGPL License to use to PIC microcontroler programming. Then any program resulted by this use would be a proprietary or free softwares.

WARNING: This project is under hard development and not intended for productive use yet but only for discussion. jCLS helps to create and maintain fine detailed component libraries for EDA tools like Altium Designer. It provides tools for data generation for masses of single parts from only the most necessary informations. Having good maintained and rich described and voluptuous detailed component libraries needs normally masses of time, work and discipline. jCLS comes here to save you from the molesting parts of this job. Feature in progress: -Some graphical improvements -Conceptual improvements -Some improvements in the file format Features added in next Release: -Built-in tutorial -Better libraries with library browser -Save and load libraries from a file -Export library data to csv files -Automatic Update Notification

This is an attempt to build an Java GUI for a low cost digital storage oscilosope based on a RS232 interface.

jEDA IDE (Java Eletronic Design Automation Integrated Development Environment) is a multiplatform, open-source tool used for electrical circuit design, schematic capture, simulation and prototyping.

A Java/SWT based schematic editor using the gEDA file format.