ReWrite getting started

John Bass — Mon, 23 Jul 2007 16:37:49 -0000

After spending a few months looking at how to implement a complete ANSI-C compliance, a rewrite finally appears in order. This allows starting with an ANSI-C compliant grammar.

One goal is to split and restructure the current scope stack logic gating into a one hot for clock enables on local variables and state flow enables, plus a conditional stack for if-then-else, switch/case/default/break, and label/goto blocks.

Another goal is to introduce memories into the architecture, to allow pointers, and larger arrays. This would initially be restricted to multiple bRAM instantiations, then include external memories as a user configurable extension.

Another goal is to map FPGA high level core blocks into the programmers resource space to support C based control of clocks, high speed serial, processor, and other vendor supplied embedded ASIC cores.

Another goal is to restructure the types to properly handle signed, unsigned, and floats in an FPGA specific way allowing use of carry chains, DSP and embedded multiplier blocks based on the target device type.

The last goal is to extend the logic generation code to handle LUTs of any arbitrary size from 2 to small N. Plus better technology mapping, to partition, fit and share logic resources dependent on the target architecture.

If you are interested in helping, let me know.

FpgaC.1.0.Beta-2 Released Today

John Bass — Fri, 03 Mar 2006 02:09:14 -0000

FpgaC made a major milestone today releasing it's second Beta release with lots of new features.

Included are better Std C support, structures, small arrays, for-loops, and lots of cleanups.

Also included is preliminary support for various MS Windows compiler platforms in the projects mswin directory.

New examples of codeing Fpga's in C are provided, including a prototype for a PCI Target Mode interface.

FpgaC project is near to Beta-2 release

John Bass — Sat, 18 Feb 2006 05:59:16 -0000

The FpgaC projects Beta-2F work-in-progress is now hosted on sf.net SVN subversion system. The current release canidate is in testing, and cleanup stages.

svn co https://svn.sourceforge.net/svnroot/fpgac/trunk/fpgac fpgac

We are looking for a Redhat/Fedora packager/maintainer to develop src/binary RPM's for the project. Also looking for a MS Windows developer to complete the initial MS Win port and package a MS Win binary release.

FpgaC team looking for a several more member

John Bass — Thu, 17 Nov 2005 22:00:37 -0000

The FpgaC project is happy to announce that in the two weeks since created, we have a base release out, plus several developers have signed up to help. There are plenty of sub projects for several more developers at all skill levels. Additional sub project info in the forum discussions for FpgaC.

FpgaC compiles a subset of C to run on FPGAs instead of using a traditional CPU, a process called reconfigurable computing. FPGAs offer a high degree of parallelism for many algorithms by building a net list that executes statement blocks with gate level parallelism. In addition multiple threads may be concurrently active, with fast on chip communications, allow algorithm speed up of 1 to 3 orders of magnitude for computationally intensive applications.

Recent posts to news

ReWrite getting started

FpgaC.1.0.Beta-2 Released Today

FpgaC project is near to Beta-2 release

FpgaC team looking for a several more member